Generally, compared to the way of bondwire connection, the cost of the interconnecting structure for connecting a chip with another chip or for connecting a chip with a carrier, such as the ribbon interconnecting structure or the flip-chip packaging, is higher. However, due to the high inductance of the bondwire itself, the operational bandwidth is quite narrow, usually below 30 GHz. Therefore, in the application of a higher frequency, e.g. 60 GHz WiGig, the bondwire cannot be used as the interconnecting structure for connecting a chip with another chip. Usually, there are two ways to solve the high inductance issue of the bondwire. The first way is to use the bondwire having a shorter length. However, the length of the bondwire is limited to the interval or height between chips or between the chip and the carrier, so the bandwidth is still limited. The second way is to dispose a plurality of bondwires on a bond-pad to reduce the inductance effect of the bondwire. However, the mutual inductance between bondwires is increased so that the equivalent inductance value cannot be reduced. Hence, the actual effect is still limited.
Using the bondwire and the plate capacitor on the chip or carrier to realize a multistage low pass filter is another commonly used interconnecting structure for connecting a chip with another chip or for connecting a chip with a carrier. However, such interconnecting structure consumes a quite large area, and does not consider and design the interconnecting structure of the ground between chips or between the chip and the carrier. Therefore, such interconnecting structure is unfeasible in practice. Another way is to use the plate capacitor on the carrier, in cooperation with the bondwire, to generate the L-C-L (inductor-capacitor-inductor) equivalent circuit. However, this way results in a quite narrow operational bandwidth and consumes the area, which is not practical.
The U.S. Pat. No. 7,242,266 uses the tapered and stepped transmission lines, in cooperation with the bondwire, to reduce the inductance effect of the bondwire. However, the structure used consumes a large area, and the cost thereof is high. In addition, the interconnecting structure of the ground between chips or between the chip and the carrier is not designed. Therefore, this patent is unfeasible in practice.
The U.S. Pat. No. 7,227,430 uses the transmission lines and the open stub to reduce the inductance effect of the bondwire. However, this patent consumes a considerable number of transmission lines and a large area, and the cost thereof is high. Moreover, the interconnecting structure of the ground between chips or between the chip and the carrier is not designed. Therefore, this patent is unfeasible in practice.
In order to overcome the drawbacks in the prior art, an interconnecting structure for electrically connecting a first electronic device with a second electronic device is provided. The particular design in the present invention not only solves the problems described above, but also is easy to be implemented. Thus, the present invention has the utility for the industry.